Concept
The proposed processor has a very limited computational capabilities. Its instruction set architecture was designed to minimize energy consumption of each operation.
The proposed processor has a very limited computational capabilities. Its instruction set architecture was designed to minimize energy consumption of each operation.
| Name | Meaning | Width |
|---|---|---|
| A | The first argument of math operations and a general purpose register | 8 |
| B | The second argument of math operations | 8 |
| C | The result of math operations | 8 |
| PC | Program counter | XLEN |
| M | Local memory address (program and data) | XLEN |
| G | Global memory address | YLEN |
| IX | Memory index register | log2(max(XLEN, YLEN)) - 3 |
| Mnemonic | Description | Operation |
|---|---|---|
| ADL | Add with carry the lowest nibble of A and B, save carry | C[3..0] ← A[3..0] + B[3..0] + Carry |
| ADH | Add with carry the highest nibble of A and B, save carry | C[7..4] ← A[7..4] + B[7..4] + Carry |
| AND | Logical and | C ← A AND B |
| OR | Logical or | C ← A OR B |
| XOR | Logical xor | C ← A XOR B |
| NOT | Logical not | C ← NOT A |
| CLC | Clear carry flag | C ← 0 |
| SEC | Set carry flag | C ← 1 |
| SHL | Shift left, put the highest bit in carry | C ← A[6..0] 0, Carry ← A[7] |
| SHR | Shift right, put the lowest bit in carry | C ← 0 A[7..1], Carry ← A[0] |
| Mnemonic | Description | Operation |
|---|---|---|
| LDA | Load to register A data from memory address from register M | A ← local[M] |
| STA | Save to memory address from register M the content of register A | local[M] ← A |
| MAZ | Set register A to zero | A ← 0 |
| MAC | Copy the content of register C to register A | A ← C |
| MBA | Copy the content of register A to register B | B ← A |
| MAM | Copy a part of memory register M to register A | A ← M[IX] |
| MMA | Copy the content of register A to memory register M | M[IX] ← A |
| MAP | Copy program counter PC to register A | A ← PC[IX] |
| MGM | Copy local memory address M to global memory address G | G ← M |
| MLG | Copy data from global to local memory | global[G] ← local[M] |
| MGL | Copy data from local to global memory | local[G] ← global[M] |
| IXZ | Set index register IX to zero | IX ← 0 |
| IXN | Increase index register IX by one | IX ← IX + 1 |
| LIL I | Load immediate nibble I to the lowest nibble of register A | A[3..0] ← I | LIH I | Load immediate nibble I to the highest nibble of register A | A[7..4] ← I |
| Mnemonic | Condition |
|---|---|
| JMP | Unconditional jump |
| JNE | Jump if C ≠ 0 |
| JE | Jump if C = 0 |
| Mnemonic | Description |
|---|---|
| HLT | Stop execution |
| NOP | No operation |
LIH 0x0; Set the highest nibble of A to zero LIL 0x2; Set the lowest nibble of A to two MBA ; Copy A to B (so A and B have number 2) CLC ; Clear carry flag ADL ; Add lower nibbles of A and B, result in C ADH ; Add higher nibbles of A and B, result in C MAC ; Copy register C to A